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NLAS1053 2:1 Mux/Demux Analog Switches
The NLAS1053 is an advanced CMOS analog switch fabricated with silicon gate CMOS technology. It achieves very high speed propagation delays and low ON resistances while maintaining CMOS low power dissipation. The device consists of a single 2:1 Mux/Demux (SPDT), similar to ON Semiconductor's NLAS4053 analog and digital voltages that may vary across the full power supply range (from VCC to GND). The inhibit and select input pins have over voltage protection that allows voltages above VCC up to 7.0 V to be present without damage or disruption of operation of the part, regardless of the operating voltage.
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US8 US SUFFIX CASE 493-01
MARKING DIAGRAMS
8 AC M G G 1 AC = Specific Device Code M = Date Code* G = Pb-Free Package (Note: Microdot may be in either location) *Date Code orientation may vary depending upon manufacturing location.
* * * * * * * * * * *
High Speed: tPD = 1 ns (Typ) at VCC = 5.0 V Low Power Dissipation: ICC = 2 mA (Max) at TA = 25C High Bandwidth, Improved Linearity, and Low RDSON INH Pin Allows a Both Channels `OFF' Condition (With a High) RDSON 25 W, Performance Very Similar to the NLAS4053 Break Before Make Circuitry, Prevents Inadvertent Shorts Useful For Switching Video Frequencies Beyond 50 MHz Latchup Performance Exceeds 300 mA ESD Performance: HBM > 2000 V; MM > 200 V, CDM > 1500 V Tiny US8 Package, Only 2.1 X 3.0 mm Pb-Free Package is Available
ORDERING INFORMATION
Device NLAS1053US COM 1 INH 2 N/C 3 GND 4 8 7 6 5 VCC CH0 CH1 Select INH NLAS1053USG Package US8 Shipping 3000 / Tape & Reel
US8 3000 / Tape & Reel (Pb-Free)
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
FUNCTION TABLE
Select X L H Ch 0 OFF ON OFF Ch 1 OFF OFF ON
Figure 1. Pin Assignment
H L L
(c) Semiconductor Components Industries, LLC, 2006
1
May, 2006 - Rev. 2
Publication Order Number: NLAS1053/D
NLAS1053
MAXIMUM RATINGS
Parameter Positive DC Supply Voltage Digital Input Voltage (Select and Inhibit) Analog Output Voltage (VCH or VCOM) DC Current, Into or Out of Any Pin Storage Temperature Range Lead Temperature, 1 mm from Case for 10 Seconds Junction Temperature under Bias Thermal Resistance Power Dissipation in Still Air at 85_C Moisture Sensitivity Flammability Rating ESD Withstand Voltage Oxygen Index: 30% - 35% Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) Above VCC and Below GND at 85_C (Note 5) Symbol VCC VIN VIS IIK TSTG TL TJ qJA PD MSL FR VESD Value -0.5 to +7.0 -0.5 V is +7.0 -0.5 V is VCC +0.5 50 -65 to +150 260 +150 250 250 Level 1 UL 94 V-0 @ 0.125 in > 2000 200 N/A 300 V Unit V V V mA _C _C _C _C/W mW
Latchup Performance
ILatchup
mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Measured with minimum pad spacing on an FR4 board, using 10 mm-by-1 inch, 2-ounce copper trace with no air flow. 2. Tested to EIA/JESD22-A114-A. 3. Tested to EIA/JESD22-A115-A. 4. Tested to JESD22-C101-A. 5. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Characteristics Positive DC Supply Voltage Digital Input Voltage (Select and Inhibit) Static or Dynamic Voltage Across an Off Switch Analog Input Voltage (CH, COM) Operating Temperature Range, All Package Types Input Rise or Fall Time (Enable Input) Vcc = 3.3 V 0.3 V Vcc = 5.0 V 0.5 V NORMALIZED FAILURE RATE Symbol VCC VIN VIO VIS TA tr, tf Min 2.0 GND GND GND -55 0 0 Max 5.5 5.5 VCC VCC +125 100 20 Unit V V V V C ns/V
DEVICE JUNCTION TEMPERATURE VERSUS TIME TO 0.1% BOND FAILURES
Junction Temperature 5C 80 90 100 110 120 130 140 Time, Hours 1,032,200 419,300 178,700 79,600 37,000 17,800 8,900 Time, Years 117.8 47.9 20.4 9.4 4.2 2.0 1.0
FAILURE RATE OF PLASTIC = CERAMIC UNTIL INTERMETALLICS OCCUR TJ = 130C TJ = 120C TJ = 110C TJ = 100C TJ = 90C TJ = 80C
1 1 10 TIME, YEARS 100 1000
Figure 2. Failure Rate versus Time Junction Temperature
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NLAS1053
DC CHARACTERISTICS - Digital Section (Voltages Referenced to GND)
Guaranteed Limit Parameter Minimum High-Level Input Voltage, Select and Inhibit Inputs Condition Symbol VIH VCC 2.0 2.5 3.0 4.5 5.5 2.0 2.5 3.0 4.5 5.5 0 V to 5.5 V *55_C to 25_C 1.5 1.9 2.1 3.15 3.85 0.5 0.6 0.9 1.35 1.65 $0.1 t85_C 1.5 1.9 2.1 3.15 3.85 0.5 0.6 0.9 1.35 1.65 $1.0 t125_C 1.5 1.9 2.1 3.15 3.85 0.5 0.6 0.9 1.35 1.65 $1.0 Unit V
Maximum Low-Level Input Voltage, Select and Inhibit Inputs
VIL
V
Maximum Input Leakage Current, Select and Inhibit Inputs Maximum Quiescent Supply Current
VIN = 5.5 V or GND
IIN
mA
Select and Inhibit = VCC or GND
ICC
5.5
1.0
1.0
2.0
mA
DC ELECTRICAL CHARACTERISTICS - Analog Section
Guaranteed Limit Parameter Maximum "ON" Resistance (Figures 17 - 23) ON Resistance Flatness (Figures 17 - 23) ON Resistance Match Between Channels CH1 or CH0 Off Leakage Current (Figure 9) COM ON Leakage Current (Figure 9) Condition VIN = VIL or VIH VIS = GND to VCC IINI 10.0 mA VIN = VIL or VIH IINI 10.0 mA VIS = 1V, 2V, 3.5V VIN = VIL or VIH IINI 10.0 mA VCH1 or VCH0 = 3.5 V VIN = VIL or VIH VCH1 or VCH0 = 1.0 VCOM 4.5 V VIN = VIL or VIH VCH1 1.0 V or 4.5 V with VCH0 floating or VCH1 1.0 V or 4.5 V with VCH1 floating VCOM = 1.0 V or 4.5 V Symbol RON VCC 2.5 3.0 4.5 5.5 4.5 -55 to 255C 70 40 20 16 4 < 855C 85 46 28 22 4 < 1255C 105 52 34 28 5 Unit W
RFLAT
(ON)
W
DRON
(ON)
4.5
2
2
3
W
ICH0 ICH1 ICOM(ON)
5.5 5.5
1 1
10 10
100 100
nA nA
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NLAS1053
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns)
Guaranteed Max Limit VCC Parameter Turn-On Time (Figures 12 and 13) INH to Output Turn-Off Time (Figures 12 and 13) INH to Output Transition Time (Channel Selection Time) (Figure ) Select to Output Minimum Break-Before-Make Time Test Conditions RL = 300 W, CL = 35 pF (Figures 4 and 5) Symbol tON (V) 2.5 3.0 4.5 5.5 2.5 3.0 4.5 5.5 2.5 3.0 4.5 5.5 2.5 3.0 4.5 5.5 2 2 1 1 2 2 1 1 5 5 2 2 1 1 1 1 -55 to 25_C Min Typ* 7 5 4 3 7 5 4 3 18 13 12 9 12 11 6 5 Max 12 10 9 8 12 10 9 8 28 21 16 14 < 85_C Min 2 2 1 1 2 2 1 1 5 5 2 2 1 1 1 1 Max 15 15 12 12 15 15 12 12 30 25 20 20 < 125_C Min 2 2 1 1 2 2 1 1 5 5 2 2 1 1 1 1 Max 15 15 12 12 15 15 12 12 30 25 20 20 Unit ns
RL = 300 W, CL = 35 pF (Figures 4 and 5)
tOFF
ns
RL = 300 W, CL = 35 pF (Figures and )
ttrans
ns
VIS = 3.0 V (Figure 3) RL = 300 W, CL = 35 pF
tBBM
ns
Typical @ 25, VCC = 5.0 V Maximum Input Capacitance, Select/INH Input Analog I/O (switch off) Common I/O (switch off) Feedthrough (switch on) *Typical Characteristics are at 25_C. CIN CNO or CNC CCOM C(ON) 8 10 10 20 pF
ADDITIONAL APPLICATION CHARACTERISTICS (Voltages Referenced to GND Unless Noted)
Parameter Maximum On-Channel -3dB Bandwidth or Minimum Frequency Response (Figure 10) Maximum Feedthrough On Loss
Condition VIN = 0 dBm VIN centered between VCC and GND (Figure 7) VIN = 0 dBm @ 100 kHz to 50 MHz VIN centered between VCC and GND (Figure 7) f = 100 kHz; VIS = 1 V RMS VIN centered between VCC and GND (Figure 7) VIN = VCC to GND, FIS = 20 kHz tr = tf = 3 ns RIS = 0 W, CL = 1000 pF Q = CL * DVOUT (Figure 8) FIS = 20 Hz to 100 kHz, RL = Rgen = 600 W CL = 50 pF VIS = 5.0 VPP sine wave
Off-Channel Isolation (Figure 10) Charge Injection Select Input to Common I/O (Figure 15)
Total Harmonic Distortion THD + Noise (Figure 14)
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IIII IIII IIII IIII IIII IIII IIII IIII IIII IIII IIII IIII IIII IIII IIII IIII IIII IIII IIII IIII
Symbol BW VONL VISO Q THD
VCC V 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 3.0 5.5
Typical 25C 170 200 200 -3 -3 -3 -93 -93 -93 1.5 3.0 Unit MHz
dB
dB
pC
5.5
0.1
%
NLAS1053
DUT VCC 0.1 mF 300 W Output VOUT 35 pF Input
VCC GND tBMM 90% Output 90% of VOH
Switch Select Pin GND
Figure 3. tBBM (Time Break-Before-Make)
VCC DUT VCC 0.1 mF Open 300 W Output VOUT 35 pF Output INH Input VOL tON tOFF Input 0V VOH 90% 90% 50% 50%
Figure 4. tON/tOFF
VCC DUT Output Open 300 W VOUT 35 pF Input
VCC 50% 0V VOH Output VOL tOFF 10% tON 10% 50%
INH Input
Figure 5. tON/tOFF
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NLAS1053
VCC 0.1 mF GND Output VOUT 300 W 35 pF VCC Output Select Pin GND 10% 90% VCC Input 0V 50% 50%
ttrans
ttrans
Figure 6. ttrans (Channel Selection Time)
50 W Reference Input Output 50 W Generator 50 W DUT Transmitted
Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. On loss is the bandwidth of an On switch. VISO, Bandwidth and VONL are independent of the input signal direction. VISO = Off Channel Isolation = 20 Log VONL = On Channel Loss = 20 Log VOUT VIN for VIN at 100 kHz
VOUT for VIN at 100 kHz to 50 MHz VIN
Bandwidth (BW) = the frequency 3 dB below VONL
Figure 7. Off Channel Isolation/On Channel Loss (BW)/Crosstalk (On Channel to Off Channel)/VONL
DUT Open Output VIN
VCC GND CL Output Off Off DVOUT
VIN
On
Figure 8. Charge Injection: (Q)
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NLAS1053
100
0 -20
Bandwidth (ON-RESPONSE)
10
LEAKAGE (nA)
1
-40 ICOM(ON) (dB)
Off Isolation
0.1
-60 ICOM(OFF) VCC = 5.0 V TA = 25_C
0.01
VCC = 5.0 V ICH(OFF)
0.001
-80
-55
-20
25
70
85
125
-100 0.01
0.1
TEMPERATURE (C)
1 10 FREQUENCY (MHz)
100 200
Figure 9. Switch Leakage versus Temperature
Figure 10. Bandwidth and Off-Channel Isolation
30
0 25 PHASE (Degree) 10 TIME (ns) 20 15 10 VCC = 5.0 V TA = 25_C 0.01 0.1 1 10 FREQUENCY (MHz) 100 200 5 0 2.5 ttrans (ns)
20
30
tON/tOFF (ns)
3
3.5
4
4.5
5
VCC (VOLTS)
Figure 11. Phase versus Frequency
Figure 12. tON and tOFF versus VCC at 255C
30 VCC = 4.5 V 25 20 TIME (ns) 15 10 5 0 -55 ttrans tON/tOFF THD + NOISE (%)
1 VINpp = 3.0 V VCC = 3.6 V
0.1 VINpp = 5.0 V VCC = 5.5 V
0.01 -40 25 Temperature (C) 85 125 1 10 FREQUENCY (kHz) 100
Figure 13. tON and tOFF versus Temp
Figure 14. Total Harmonic Distortion Plus Noise versus Frequency
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NLAS1053
3.0 2.5 2.0 Q (pC) 1.5 1.0 0.5 0 -0.5 0 1 2 VCOM (V) 3 4 5 VCC = 3 V VCC = 5 V ICC (nA) 100 10 1 0.1 0.01 0.001 0.0001 0.00001 -40 VCC = 3.0 V
VCC = 5.0 V -20 0 20 60 80 100 120
Temperature (C)
Figure 15. Charge Injection versus COM Voltage
Figure 16. ICC versus Temp, VCC = 3 V & 5 V
100 VCC = 2.0 V 80
100 90 80 70
RON (W)
RON (W)
60 VCC = 2.5 V VCC = 3.0 V 20 VCC = 4.5 V
60 50 40 30 20 10 -55C 0 0.5 1 1.5 2 2.5 25C 125C 85C
40
0 0 1 2 3 4 5 VCOM (VOLTS)
0 VCOM (VOLTS)
Figure 17. RON versus VCOM and VCC (@ 255C
Figure 18. RON versus VCOM and Temperature, VCC 2.0 V
70 60 50 RON (W) 40 30 125C 20 85C 10 0 0 0.5 1 1.5 VCOM (VOLTS) 2 2.5 3 -55C RON (W) 25C
40 35 30 25 20 15 85C 10 5 0 0 0.5 1 1.5 2 2.5 3 3.5 VCOM (VOLTS) -55C 25C 125C
Figure 19. RON versus VCOM and Temperature, VCC = 2.5 V http://onsemi.com
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Figure 20. RON versus VCOM and Temperature, VCC = 3.0 V
NLAS1053
20 18 16 14 RON (W) RON (W) 12 10 8 6 4 2 0 0 1 2 3 VCOM (VOLTS) 4 5 25C -55C 4 2 0 0 1 2 3 VCOM (VOLTS) 4 5 6 85C 125C 18 16 14 12 10 85C 8 -55C 6 25C 125C
Figure 21. RON versus VCOM and Temperature, VCC = 4.5 V
20
Figure 22. RON versus VCOM and Temperature, VCC = 5.0 V
15 125C RON (W) 10
85C
5 -55C 0 0 1 2 3 VCOM (VOLTS) 4
25C
5
6
Figure 23. RON versus VCOM and Temperature, VCC = 5.5 V
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NLAS1053
PACKAGE DIMENSIONS
US8 CASE 493-02 ISSUE B
-X- A
8 5 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION "A" DOES NOT INCLUDE MOLD FLASH, PROTRUSION OR GATE BURR. MOLD FLASH. PROTRUSION AND GATE BURR SHALL NOT EXCEED 0.140 MM (0.0055") PER SIDE. 4. DIMENSION "B" DOES NOT INCLUDE INTER-LEAD FLASH OR PROTRUSION. INTER-LEAD FLASH AND PROTRUSION SHALL NOT E3XCEED 0.140 (0.0055") PER SIDE. 5. LEAD FINISH IS SOLDER PLATING WITH THICKNESS OF 0.0076-0.0203 MM. (300-800 "). 6. ALL TOLERANCE UNLESS OTHERWISE SPECIFIED 0.0508 (0.0002 "). DIM A B C D F G H J K L M N P R S U V MILLIMETERS MIN MAX 1.90 2.10 2.20 2.40 0.60 0.90 0.17 0.25 0.20 0.35 0.50 BSC 0.40 REF 0.10 0.18 0.00 0.10 3.00 3.20 0_ 6_ 5_ 10 _ 0.23 0.34 0.23 0.33 0.37 0.47 0.60 0.80 0.12 BSC INCHES MIN MAX 0.075 0.083 0.087 0.094 0.024 0.035 0.007 0.010 0.008 0.014 0.020 BSC 0.016 REF 0.004 0.007 0.000 0.004 0.118 0.126 0_ 6_ 5_ 10 _ 0.010 0.013 0.009 0.013 0.015 0.019 0.024 0.031 0.005 BSC
-Y-
J
DETAIL E B L
1
4
R S U C
P
G
-T-
SEATING PLANE
D 0.10 (0.004)
K
M
0.10 (0.004) T N TXY V
H
R 0.10 TYP
M
DETAIL E
F
SOLDERING FOOTPRINT*
3.8 0.15 0.50 0.0197 1.8 0.07 0.30 0.012 1.0 0.0394
SCALE 8:1
mm inches
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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NLAS1053/D

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